Viterbi Decoder Implementation Using VHDL for Convolution Encoding

Vol-4 | Issue-02 | February 2019 | Published Online: 10 February 2019    PDF ( 473 KB )
Author(s)
Sreekaram Jagadeesh 1; D Y Pushpamithra 2; Revanth Kumar T R 3

1Assistant Professor, SITAMS (autonomous), jntua university (India)

2Assistant Professor, SITAMS (autonomous), jntua university (India)

3Associate Professor, SVEW, jntua university (India)

Abstract

In modern communication channels in order to improve the capacity of the particular communicating systems Viterbi decoding technique is used as key source in wireless communication domain. In this system for detecting the error and correcting the same error we use comparator in Viterbi decoder. We generally use Viterbi decoder for forward error correction with the combination of convolutional encoding technique, Which is the powerful method to the capacity of the system. For convolution coding most widely used algorithm is Viterbi algorithm which is dynamic to observe the hidden states of the path involved. In this paper, Viterbi decoder is implemented in Xilinx tool and code developed in VHDL. Code executed and simulated using Xilinx ISE and ISIM software and power analysis calculated.

Keywords
Viterbi Algorithm, Convolution codes, Adaptive Viterbi decoder, Memory path, Register Exchange
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