Error Detection in Majority Logic Decoding of Euclidean Geometry Low Density Parity Check (EG-LDPC) Code

Vol-4 | Issue-5 | May 2019 | Published Online: 15 May 2019    PDF ( 152 KB )
Author(s)
Anvesh Thatikonda 1; Dr. C Chitra 2

1Research Scholar, Sri Satya Sai University, Sehore M.P. (India)

2Research Guide, Sri Satya Sai University, Sehore M.P. (India)

Abstract

The deficiency secure memory framework comprise encoder, decoder, finder and parallel pipelined corrector. In this the information ought to be exchanged through the encoder and after that it will be decoded, the decoder comprise the identifier and corrector if the information have any mistakes that ought to be distinguished by finder and afterward that information will be amended by the parallel pipelined corrector. So it has substantial translating time to address the information by utilizing parallel pipeline corrector. To decrease this one here we are utilizing dominant part rationale interpreting with EGLDPC (Euclidean Geometry Low Density Parity Check) codes. In this strategy the framework was check whether the information has any mistakes in the main cycles of the larger part rationale interpreting in the event that it doesn't has any blunders the deciphering part will be finished without finishing the remainder of emphasess. With this the greater part of the words have no blunders in the memory and the normal time is likewise diminished.

Keywords
Error correction codes, Euclidean geometry low-density parity check (EG-LDPC) codes, majority logic decoding, memory.
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